Modern Computer Architecture and Organization: Learn x86, ARM, and RISC-V architectures (2nd Edition) Год издания: 2022 Автор: Jim Ledin Жанр или тематика: Computer Architecture, Computer Science Издательство: Packt ISBN: 978-1-80323-451-9 Язык: Английский Формат: EPUB Качество: Издательский макет или текст (eBook) Интерактивное оглавление: Да Количество страниц: 630 Описание: A no-nonsense, practical guide to current and future processor and computer architectures that enables you to design computer systems and develop better software applications across a variety of domains Key Features
Understand digital circuitry through the study of transistors, logic gates, and sequential logic
Learn the architecture of x86, x64, ARM, and RISC-V processors, iPhones, and high-performance gaming PCs
Study the design principles underlying the domains of cybersecurity, bitcoin, and self-driving cars
Book Description Are you a software developer, systems designer, or computer architecture student looking for a methodical introduction to digital device architectures, but are overwhelmed by the complexity of modern systems? This step-by-step guide will teach you how modern computer systems work with the help of practical examples and exercises. You'll gain insights into the internal behavior of processors down to the circuit level and will understand how the hardware executes code developed in high-level languages. This book will teach you the fundamentals of computer systems including transistors, logic gates, sequential logic, and instruction pipelines. You will learn details of modern processor architectures and instruction sets including x86, x64, ARM, and RISC-V. You will see how to implement a RISC-V processor in a low-cost FPGA board and write a quantum computing program and run it on an actual quantum computer. This edition has been updated to cover the architecture and design principles underlying the important domains of cybersecurity, blockchain and bitcoin mining, and self-driving vehicles. By the end of this book, you will have a thorough understanding of modern processors and computer architecture and the future directions these technologies are likely to take. What you will learn
Understand the fundamentals of transistor technology and digital circuits
Explore the concepts underlying pipelining and superscalar processing
Implement a complete RISC-V processor in a low-cost FPGA
Understand the technology used to implement virtual machines
Learn about security-critical computing applications like financial transaction processing
Get up to speed with blockchain and the hardware architectures used in bitcoin mining
Explore the capabilities of self-navigating vehicle computing architectures
Write a quantum computing program and run it on a real quantum computer
Who this book is for This book is for software developers, computer engineering students, system designers, reverse engineers, and anyone looking to understand the architecture and design principles underlying modern computer systems: ranging from tiny, embedded devices to warehouse-size cloud server farms. A general understanding of computer processors is helpful but not required. Ledin Jim - Modern Computer Architecture and Organization: Learn x86, ARM, and RISC-V architectures (2nd Edition) [2022, PDF, ENG] Оглавление Contents Preface Who this book is for What this book covers To get the most out of this book Get in touch Introducing Computer Architecture Technical requirements The evolution of automated computing devices Charles Babbage’s Analytical Engine ENIAC IBM PC The Intel 8088 microprocessor The Intel 80286 and 80386 microprocessors The iPhone Moore’s law Computer architecture Representing numbers with voltage levels Binary and hexadecimal numbers The 6502 microprocessor The 6502 instruction set Summary Exercises Digital Logic Technical requirements Electrical circuits The transistor Logic gates Latches Flip-flops Registers Adders Propagation delay Clocking Sequential logic Hardware description languages VHDL Summary Exercises Processor Elements Technical requirements A simple processor Control unit Executing an instruction – a simple example Arithmetic logic unit Registers The instruction set Addressing modes Immediate addressing mode Absolute addressing mode Absolute indexed addressing mode Indirect indexed addressing mode Instruction categories Memory load and store instructions Register-to-register data transfer instructions Stack instructions Arithmetic instructions Logical instructions Branching instructions Subroutine call and return instructions Processor flag instructions Interrupt-related instructions No operation instruction Interrupt processing processing processing BRK instruction processing Input/output operations Programmed I/O Interrupt-driven I/O Direct memory access Summary Exercises Computer System Components Technical requirements Memory subsystem Introducing the MOSFET Constructing DRAM circuits with MOSFETs The capacitor The DRAM bit cell DDR5 SDRAM Graphics DDR Prefetching I/O subsystem Parallel and serial data buses PCI Express SATA M.2 USB Thunderbolt Graphics displays VGA DVI HDMI DisplayPort Network interface Ethernet Wi-Fi Keyboard and mouse Keyboard Mouse Modern computer system specifications Summary Exercises Hardware-Software Interface Technical requirements Device drivers The parallel port PCIe device drivers Device driver structure BIOS UEFI The boot process BIOS boot UEFI boot Trusted boot Embedded devices Operating systems Processes and threads Scheduling algorithms and process priority Multiprocessing Summary Exercises Specialized Computing Domains Technical requirements Real-time computing Real-time operating systems Digital signal processing ADCs and DACs DSP hardware features Signal processing algorithms Convolution Digital filtering Fast Fourier transform (FFT) GPU processing GPUs as data processors Big data Deep learning Examples of specialized architectures Summary Exercises Processor and Memory Architectures Technical requirements The von Neumann, Harvard, and modified Harvard architectures The von Neumann architecture The Harvard architecture The modified Harvard architecture Physical and virtual memory Paged virtual memory Page status bits Memory pools Memory management unit Summary Exercises Performance-Enhancing Techniques Technical requirements Cache memory Multilevel processor caches Static RAM Level 1 cache Direct-mapped cache Set associative cache Processor cache write policies Level 2 and level 3 processor caches Instruction pipelining Superpipelining Pipeline hazards Micro-operations and register renaming Conditional branches Simultaneous multithreading SIMD processing Summary Exercises Specialized Processor Extensions Technical requirements Privileged processor modes Handling interrupts and exceptions Protection rings Supervisor mode and user mode System calls Floating-point arithmetic The 8087 floating-point coprocessor The IEEE 754 floating-point standard Power management Dynamic voltage frequency scaling System security management Trusted Platform Module Thwarting cyberattackers Summary Exercises Modern Processor Architectures and Instruction Sets Technical requirements x86 architecture and instruction set The x86 register set x86 addressing modes Implied addressing Register addressing Immediate addressing Direct memory addressing Register indirect addressing Indexed addressing Based indexed addressing Based indexed addressing with scaling x86 instruction categories Data movement Stack manipulation Arithmetic and logic Conversions Control flow String manipulation Flag manipulation Input/output Protected mode Miscellaneous instructions Other instruction categories Common instruction patterns x86 instruction formats x86 assembly language x64 architecture and instruction set The x64 register set x64 instruction categories and formats x64 assembly language 32-bit ARM architecture and instruction set The ARM register set ARM addressing modes Immediate Register direct Register indirect Register indirect with offset Register indirect with offset, pre-incremented Register indirect with offset, post-incremented Double register indirect Double register indirect with scaling ARM instruction categories Load/store Stack manipulation Register movement Arithmetic and logic Comparisons Control flow Supervisor mode Breakpoint Conditional execution Other instruction categories 32-bit ARM assembly language 64-bit ARM architecture and instruction set 64-bit ARM assembly language Summary Exercises The RISC-V Architecture and Instruction Set Technical requirements The RISC-V architecture and applications The RISC-V base instruction set Computational instructions Control flow instructions Memory access instructions System instructions Pseudo-instructions Privilege levels RISC-V extensions The M extension The A extension The C extension The F and D extensions Other extensions RISC-V variants 64-bit RISC-V Standard RISC-V configurations RISC-V assembly language Implementing RISC-V in an FPGA Summary Exercises Processor Virtualization Technical requirements Introducing virtualization Types of virtualization Operating system virtualization Application virtualization Network virtualization Storage virtualization Categories of processor virtualization Trap-and-emulate virtualization Paravirtualization Binary translation Hardware emulation Virtualization challenges Unsafe instructions Shadow page tables Security Virtualizing modern processors x86 processor virtualization x86 hardware virtualization ARM processor virtualization RISC-V processor virtualization Virtualization tools VirtualBox VMware Workstation VMware ESXi KVM Xen QEMU Virtualization and cloud computing Electrical power consumption Summary Exercises Domain-Specific Computer Architectures Technical requirements Architecting computer systems to meet unique requirements Smartphone architecture iPhone 13 Pro Max Personal computer architecture Alienware Aurora Ryzen Edition R10 gaming desktop Ryzen 9 5950X branch prediction Nvidia GeForce RTX 3090 GPU Aurora subsystems Warehouse-scale computing architecture WSC hardware Rack-based servers Hardware fault management Electrical power consumption The WSC as a multilevel information cache Deploying a cloud application Neural networks and machine learning architectures Intel Nervana neural network processor Summary Exercises Cybersecurity and Confidential Computing Architectures Technical requirements Cybersecurity threats Cybersecurity threat categories Cyberattack techniques Types of malware Post-exploitation actions Features of secure hardware Identify what needs to be protected Anticipate all types of attacks Features of secure system design Secure key storage Encryption of data at rest Encryption of data in transit Cryptographically secure key generation Secure boot procedure Tamper-resistant hardware design Confidential computing Designing for security at the architectural level Avoid security through obscurity Comprehensive secure design The principle of least privilege Zero trust architecture Ensuring security in system and application software Common software weaknesses Buffer overflow Cross-site scripting SQL injection Path traversal Source code security scans Summary Exercises Blockchain and Bitcoin Mining Architectures Technical requirements Introduction to blockchain and bitcoin The SHA-256 hash algorithm Computing SHA-256 Bitcoin core software The bitcoin mining process Bitcoin mining pools Mining with a CPU Mining with a GPU Bitcoin mining computer architectures Mining with FPGAs Mining with ASICs Bitcoin mining economics Alternative types of cryptocurrency Summary Exercises Self-Driving Vehicle Architectures Technical requirements Overview of self-driving vehicles Driving autonomy levels Safety concerns of self-driving vehicles Hardware and software requirements for self-driving vehicles Sensing vehicle state and the surroundings GPS, speedometer, and inertial sensors Video cameras Radar Lidar Sonar Perceiving the environment Convolutional neural networks Example CNN implementation CNNs in autonomous driving applications Lidar localization Object tracking Decision processing Lane keeping Complying with the rules of the road Avoiding objects Planning the vehicle path Autonomous vehicle computing architecture Tesla HW3 Autopilot Summary Exercises Quantum Computing and Other Future Directions in Computer Architectures Technical requirements The ongoing evolution of computer architectures Extrapolating from current trends Moore’s law revisited The third dimension Increased device specialization Potentially disruptive technologies Quantum physics Spintronics Quantum computing Quantum code-breaking Adiabatic quantum computation The future of quantum computing Carbon nanotubes Building a future-tolerant skill set Continuous learning College education Conferences and literature Summary Exercises Appendix Answers to Exercises Chapter 1: Introducing Computer Architecture Exercise 1 Answer Exercise 2 Answer Exercise 3 Answer Exercise 4 Answer Exercise 5 Answer Exercise 6 Answer Chapter 2: Digital Logic Exercise 1 Answer Exercise 2 Answer Exercise 3 Answer Exercise 4 Answer Exercise 5 Answer Exercise 6 Answer Chapter 3: Processor Elements Exercise 1 Answer Exercise 2 Answer Exercise 3 Answer Exercise 4 Answer Exercise 5 Answer Exercise 6 Answer Chapter 4: Computer System Components Exercise 1 Answer Exercise 2 Answer Chapter 5: Hardware-Software Interface Exercise 1 Answer Exercise 2 Answer Chapter 6: Specialized Computing Domains Exercise 1 Answer Exercise 2 Answer Exercise 3 Answer Chapter 7: Processor and Memory Architectures Exercise 1 Answer Exercise 2 Answer Exercise 3 Answer Chapter 8: Performance-Enhancing Techniques Exercise 1 Answer Exercise 2 Answer Exercise 3 Answer Chapter 9: Specialized Processor Extensions Exercise 1 Answer Exercise 2 Answer Exercise 3 Answer Exercise 4 Answer Exercise 5 Answer Exercise 6 Answer Exercise 7 Answer Exercise 8 Answer Chapter 10: Modern Processor Architectures and Instruction Sets Exercise 1 Answer Exercise 2 Answer Exercise 3 Answer Exercise 4 Answer Exercise 5 Answer Exercise 6 Answer Exercise 7 Answer Exercise 8 Answer Chapter 11: The RISC-V Architecture and Instruction Set Exercise 1 Answer Exercise 2 Answer Exercise 3 Answer Chapter 12: Processor Virtualization Exercise 1 Answer Exercise 2 Answer Exercise 3 Answer Chapter 13: Domain-Specific Computer Architectures Exercise 1 Answer Exercise 2 Answer Chapter 14: Cybersecurity and Confidential Computing Architectures Exercise 1 Answer Exercise 2 Answer Exercise 3 Answer Chapter 15: Blockchain and Bitcoin Mining Architectures Exercise 1 Answer Exercise 2 Answer Chapter 16: Self-Driving Vehicle Architectures Exercise 1 Answer Exercise 2 Answer Exercise 3 Answer Exercise 4 Answer Chapter 17: Future Directions in Computer Architectures Exercise 1 Answer Exercise 2 Answer Exercise 3 Answer Exercise 4 Answer Other Books You May Enjoy Index[/pre]
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